// Config header file
// Every source file should include this

#ifndef ETB_CONFIG_H_
#define ETB_CONFIG_H_

#include <iostream>
#include <stdlib.h>

#define DEBUG

#ifndef DEBUG
# define ASSERT(x)
# define MSG(str)
#else
# define ASSERT(x) \
    if (!(x)) \
    {\
      std::cout << "ASSERT FAILED in " << __FILE__ << ":" << __LINE__ << std::endl;\
      abort();\
    }
# define MSG(str) \
    std::cout << str << std::endl;
#endif  // DEBUG

#define ETB_CMD_TARGET_EM     "board"
#define ETB_CMD_TARGET_VI     "ui"

#define ETB_CMD_DEV_BOARD     "board"
#define ETB_CMD_DEV_CPU       "cpu"
#define ETB_CMD_DEV_KEY1      "key1"
#define ETB_CMD_DEV_KEY2      "key2"
#define ETB_CMD_DEV_KEY3      "key3"
#define ETB_CMD_DEV_KEY4      "key4"
#define ETB_CMD_DEV_KEY5      "key5"
#define ETB_CMD_DEV_KEY6      "key6"
#define ETB_CMD_DEV_RESET_KEY "reset_key"
#define ETB_CMD_DEV_LED1      "led1"
#define ETB_CMD_DEV_LED2      "led2"
#define ETB_CMD_DEV_LED3      "led3"
#define ETB_CMD_DEV_LED4      "led4"
#define ETB_CMD_DEV_PWR_LED   "power_led"
#define ETB_CMD_DEV_PWR_SWI   "power_swi"
#define ETB_CMD_DEV_FLASH_SWI "flash_boot_swi"
#define ETB_CMD_DEV_LCD       "lcd"
#define ETB_CMD_DEV_STATE     "state"

#define ETB_CMD_PARAM_RUN     "run"
#define ETB_CMD_PARAM_STOP    "stop"
#define ETB_CMD_PARAM_STEP    "step"
#define ETB_CMD_PARAM_PRESS   "pressed"
#define ETB_CMD_PARAM_RELEASE "released"
#define ETB_CMD_PARAM_ON      "on"
#define ETB_CMD_PARAM_OFF     "off"
#define ETB_CMD_PARAM_ADDR    "addr"

typedef unsigned long long    U64;
typedef unsigned int          U32;
typedef unsigned short        U16;
typedef unsigned char         U8;

#define MODULE_PATH         "mod"
#define CONF_FILENAME       "skyeye.conf"
#define NORFLASH_FILENAME   "norflash.bin"
#define NORFLASH_SIZE       2097152
#define MEMORY_BASEADDR     0x30000000
#define MEMORY_SIZE         0x4000000

#define BOARD_XML_PATH      "board"
#define BOARD_XML_FILE      "board.xml"

// Boot from NAND(SRAM Stepping Stone)
#define CONF_CONTENT_NAND \
      "cpu: arm920t\nmach: s3c2440\n"\
      "mem_bank: map=M, type=RW, addr=0x00000000, size=0x00001000\n"\
      "mem_bank: map=F, type=RW, addr=0x10000000, size=0x00200000\n"\
      "mem_bank: map=M, type=RW, addr=0x30000000, size=0x04000000\n"\
      "mem_bank: map=I, type=RW, addr=0x48000000, size=0x20000000\n\n"\
      "uart: mod=net\nlcd: type=s3c2410x\n"\
      "flash: type=SST39VF160, base=0x10000000, size=0x00200000, filebase=./norflash.bin\n"

// Boot from NOR flash
#define CONF_CONTENT_NOR \
      "cpu: arm920t\nmach: s3c2440\n"\
      "mem_bank: map=F, type=RW, addr=0x00000000, size=0x00200000\n"\
      "mem_bank: map=M, type=RW, addr=0x30000000, size=0x04000000\n"\
      "mem_bank: map=I, type=RW, addr=0x48000000, size=0x20000000\n\n"\
      "uart: mod=net\nlcd: type=s3c2410x\n"\
      "flash: type=SST39VF160, base=0x00000000, size=0x00200000, filebase=./norflash.bin\n"

#endif  // ETB_CONFIG_H_
